NT Bus Protocol: Difference between revisions
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#define NTBUS_CMD 0x00 // 0b 0000 0000 | #define NTBUS_CMD 0x00 // 0b 0000 0000 | ||
Depending on the command, the start byte may be followed by further bytes. The 7th bit of all these bytes must be low! Hence, the start of a message can be uniquely identified by a high 7th bit | Depending on the command, the start byte may be followed by further bytes. The 7th bit of all these bytes must be low! Hence, the start of a message can be uniquely identified by a high 7th bit. If the message bytes which may follow the start byte represent data, then the last byte must be a crc byte, which is simply a xor, with the 7th bit set to low. | ||
It should be noted that the data emitted by a slave can use the 7th bit, since by design a slave never sends a command. | It should be noted that the data emitted by a slave can use the 7th bit, since by design a slave never sends a command. | ||
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0xC3 + 10x motor data bytes + crc: set all motor to the new positions | 0xC3 + 10x motor data bytes + crc: set all motor to the new positions | ||
== Error Handling == | |||
In the data stream from the master to the slaves only the start byte may have the 7th bit high. The data parser must reset on this occasion, which establishes the mechanism to return to proper operation if some error should have occurred. | |||
In addition the receiving UARTs should check for error conditions offered by the hardware. For a STM32F103 this would be e.g. the overrun, noise, and frame flags. |
Revision as of 19:41, 30 September 2015
The information on this page refers to firmware v0.86e and higher.
This page describes the protocol of the NT bus communication.
Hardware Details
The NT bus is nothing else than a standard TTL-UART, with parameters:
2.000.000 bps, 8 bits, 1 stop, no parity
The voltage levels are 3.3 V.
The Tx pin of any NT module connected to the bus has to be held in a high-impedance state in normal conditions. This line should be pulled to high by a pull up resistor near/on the main STorM32 board.
Concept
The NT bus is designed as a Master-Slave network, with only one master, namely the main STorM32 board. Any slave connected to the bus needs to have its own unique ID. The ID has 4 bits. ID = 0 is used to address all NT slaves on the bus, so that up to 15 slaves can be addressed. Currently these IDs are assigned:
#define NTBUS_ID_ALLMODULES 0 #define NTBUS_ID_IMU1 1 #define NTBUS_ID_IMU2 2 #define NTBUS_ID_MOTORALL 3 #define NTBUS_ID_MOTORPITCH 4 #define NTBUS_ID_MOTORROLL 5 #define NTBUS_ID_MOTORYAW 6 #define NTBUS_ID_CAMERA 7 #define NTBUS_ID_JOYSTICK 8 #define NTBUS_ID_KEYS 9 #define NTBUS_ID_PWMOUT 10 #define NTBUS_ID_LOGGER 11
The slaves can either be Talker&Listener or only Listener. At any point in time only one slave is permitted to be talking, i.e. to send data to the master. Any slave is talking only in response to a command received by the master, a slave may not send a message on its own.
The message emitted by the master begins with a start byte with the following structure:
bit 7 always high bits 4-6 quick command bits 0-3 slave ID
#define NTBUS_STX 0x80 // 0b 1000 0000 #define NTBUS_SFMASK 0x70 // 0b 0111 0000 #define NTBUS_IDMASK 0x0F // 0b 0000 1111
The following quick commands are defined:
#define NTBUS_FLASH 0x70 // 0b 0111 0000 #define NTBUS_RESET 0x50 // 0b 0101 0000 #define NTBUS_SET 0x40 // 0b 0100 0000 #define NTBUS_GET 0x30 // 0b 0011 0000 #define NTBUS_TRIGGER 0x10 // 0b 0001 0000 #define NTBUS_CMD 0x00 // 0b 0000 0000
Depending on the command, the start byte may be followed by further bytes. The 7th bit of all these bytes must be low! Hence, the start of a message can be uniquely identified by a high 7th bit. If the message bytes which may follow the start byte represent data, then the last byte must be a crc byte, which is simply a xor, with the 7th bit set to low.
It should be noted that the data emitted by a slave can use the 7th bit, since by design a slave never sends a command.
Examples:
- The first message emitted by the master at the beginning of every new cycle is a group trigger, i.e.
0x90: triggers all NT modules
- When the data of the camera imu (IMU1) is requested by emitting
0xB1: get IMU1 data
- Eventually the new motor angles will be send to all motor modules, which is done by addressing them all, i.e.
0xC3 + 10x motor data bytes + crc: set all motor to the new positions
Error Handling
In the data stream from the master to the slaves only the start byte may have the 7th bit high. The data parser must reset on this occasion, which establishes the mechanism to return to proper operation if some error should have occurred.
In addition the receiving UARTs should check for error conditions offered by the hardware. For a STM32F103 this would be e.g. the overrun, noise, and frame flags.